intermediate frequency signal中文是什么意思

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中文翻譯
造句

中頻信號(hào)

intermediate frequency 【無(wú)線電】中頻。
signal n. 1.信號(hào)，暗號(hào)；信號(hào)器。 2.動(dòng)機(jī)，導(dǎo)火線 (fo ...
intermediate-frequency signal 中頻信號(hào)
zero intermediate frequency signal 零中頻信號(hào)
intermediate signal 中途標(biāo)志
frequency, intermediate (if) 中頻
if ( intermediate frequency ) 中頻
if intermediate frequency 中頻
intermediate frequency if 中頻
frequency of signal 信號(hào)頻率
frequency signal 頻率信號(hào)
signal frequency 信號(hào)頻率
double intermediate signal location 并置中間信號(hào)點(diǎn)
intermediate signal location 中間信號(hào)位置, 中間信號(hào)點(diǎn)
intermediate video signal 中間視頻信號(hào)
signal intermediate repair 信號(hào)中修
high-intermediate-frequency receiver 高中頻超外差式接收機(jī)
image intermediate frequency amplifier 圖像中頻放大器
image intermediate frequency transformer 圖像信號(hào)中頻變壓器; 像信號(hào)中頻變壓器
intermediate allelic frequency 中間等位基因頻率
intermediate frequency amplification 中頻放大
intermediate frequency amplifier 中頻放大器
intermediate frequency amplifier gain 中頻放大器增益
intermediate frequency attenuator 中頻衰減器
intermediate frequency cancellation 中頻對(duì)消

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例句與用法

3 . accomplished the hardware design of intermediate frequency signal processing 4 . accomplished the software design of intermediate frequency signal processing
3 .完成了中頻信號(hào)處理的硬件設(shè)計(jì)。 4 .完成了中頻信號(hào)處理的軟件設(shè)計(jì)。
In the digital intermediate frequency project , the intermediate frequency signal is converted to digital signal directly into the dsp chip , then it is be processed by dft
數(shù)字中頻方案將中頻信號(hào)直接通過(guò)a / d轉(zhuǎn)換后送入dsp芯片進(jìn)行dft變換，最后得到待測(cè)信號(hào)頻譜的采樣序列。
By analysis of the intermediate frequency signals which through eight antennae and receiver channels , eight channels radio spatial spectrum direction finding system can reach the purpose of finding radio direction
八通道無(wú)線電空間譜測(cè)向系統(tǒng)通過(guò)分析經(jīng)過(guò)八路天線和接收機(jī)通道以后的中頻信號(hào)達(dá)到確定無(wú)線電信號(hào)方向的目的。
In this thesis , aimed at the above - mentioned two - side problems , based on analyzing the theory of lfmcw radar ranging deeply , we implement the work of intermediate frequency signal processing
本論文針對(duì)上述兩方面的問(wèn)題,在深入分析lfmcw雷達(dá)測(cè)距理論基礎(chǔ)上,在工程上完成了一部8mm毫米波線性調(diào)頻連續(xù)波測(cè)距雷達(dá)的中頻信號(hào)處理工作。
Due to the hardware characteristic ' s limitation , such as the poor speed of a / d , d / a conversion and dsp process , the most part of sr system adopt middle course . that is to say , by using the special digital converter or running relevant arithmetic , it converts the radio signal to intermediate frequency signal and completes the base - band signal process that is n ' t the veriest sr and is named " software defined radio ( sdr ) "
由于受到硬件性能如a d 、 d a及dsp芯片處理速度的限制，目前的軟件無(wú)線電系統(tǒng)多采用折中的實(shí)現(xiàn)方案，增加專用的數(shù)字變頻器或者運(yùn)行數(shù)字變頻算法，將射頻信號(hào)變頻到中頻，然后再進(jìn)行基帶信號(hào)處理，這樣的軟件無(wú)線電系統(tǒng)又被稱之為“軟件定義無(wú)線電” ，它并不是真正意義上的軟件無(wú)線電。
On the basis of the theory of software radio , this paper discusses how to design and develop a realtime digital signal processing system in graphic programming language on a universal hardware workbench of digital signal processing aiming at satellitic intermediate frequency signal
本文論述了基于軟件無(wú)線電思想，在一個(gè)通用的數(shù)字信號(hào)處理硬件平臺(tái)上，針對(duì)衛(wèi)星中頻信號(hào)，用美國(guó)國(guó)家儀器公司提供的開發(fā)虛擬儀器的labview平臺(tái)研制開發(fā)了一個(gè)實(shí)時(shí)的數(shù)字信號(hào)處理系統(tǒng)。
Simulator presented in this paper provides a direct interface for the test of shortwave communication system , which well represents various features of hf channel such as multi - path delay , rayleigh fading , doppler shift , doppler spread , gaussian noise and impulsive interference , etc . in order to realize the channel simulation for the intermediate frequency signal , we , inspired by the idea of soft - defined radio , bring forward a new design method that the channel simulator consists of several dsp chips
本文研制的仿真器提供接口直接對(duì)短波通信系統(tǒng)進(jìn)行測(cè)試,能夠全面反映短波信道的多徑時(shí)延、瑞利衰落、多普勒頻移、多普勒擴(kuò)展、高斯噪聲和脈沖干擾等特性。為了實(shí)現(xiàn)對(duì)中頻信號(hào)的信道仿真,開發(fā)出一個(gè)結(jié)合軟件無(wú)線電思想的由多個(gè)數(shù)字信號(hào)處理芯片構(gòu)成的短波信道物理仿真器。
The radio frequency receiver supports interface for instrument and base station and air interface for mobile station , and it takes the task of magnifying low noise and down - convert and digital baseband processor filtering and magnifying intermediate frequency to reverse link signal . the digital baseband processor samples the received signal after down - convert radio frequency signal to intermediate frequency signal and processes other processing and supports interfaces to computer , next sends data to computer . the gps receiver supports interface for instrument and gps system , and receives gps system signal , next it demodulates the correlative information and sends out benchmark clock signal we need
射頻接收部分主要為儀器和基站、移動(dòng)臺(tái)提供空中接口,其主要任務(wù)是在反向鏈路上對(duì)接收到的射頻調(diào)制信號(hào)進(jìn)行低噪聲放大、射頻下變頻變換、中頻濾波放大等;數(shù)字基帶部分為對(duì)接收信號(hào)變頻為中頻后進(jìn)行a / d采樣,以及其他的rsp處理并和計(jì)算機(jī)提供接口,將數(shù)據(jù)送至計(jì)算機(jī)進(jìn)行后臺(tái)處理、顯示等; gps接收機(jī)部分為儀器和gps系統(tǒng)提供接口,接收gps系統(tǒng)信號(hào)并解調(diào)相關(guān)信息,輸出所需的電文及時(shí)鐘基準(zhǔn)信息等。
This thesis deals with design and application of a multiprocessor made of four dsps in monitoring receiver . the broadband monitoring receiver requires a kind of chip with high performance because of complicated intermediate frequency signal processing . the author selects a kind of digital signal processor called adsp21160 . during the process of design , the author uses cpld , fpga and some special cpus to finish signal , processing in the monitoring receiver . cluster multiprocessor based on vxibus made of four adsp21160 is put forward . the task distribution of four dsps is solved too . furthermore , data transition methods between chips at a high speed through link ports and chip extension mode using external port are recommended . the author debugs , emulates the program in one adsp - 21160 ez - kit lite and simulates the multiprocessor program in visualdsp + +
本文主要探討了監(jiān)測(cè)接收機(jī)中多dsp處理模塊的設(shè)計(jì)與應(yīng)用，寬帶監(jiān)測(cè)接收機(jī)的中頻處理數(shù)據(jù)量大、實(shí)時(shí)性高，這樣，對(duì)dsp芯片提出了很高的要求，作者通過(guò)比較選擇了最適用于監(jiān)測(cè)接收機(jī)的數(shù)字信號(hào)處理器adsp21160 ，并結(jié)合使用了cpld 、 fpga以及一些專用的cpu來(lái)完成監(jiān)測(cè)接收機(jī)中的數(shù)據(jù)處理。作者提出了由四片adsp21160組成的簇式多dsp處理模塊的結(jié)構(gòu)并配以了vxi總線，論述了簇式結(jié)構(gòu)的特點(diǎn)，解決了多dsp處理模塊中四片adsp21160的任務(wù)分配問(wèn)題。
When the cur - cuit resets , the chip remains accepting state , works in burst mode , and adopts dpsk modulation mode . it proceeds quadrature - sampled intermediate frequency signal after the ad9057 has converted , then down - converses , despreads and demodulates . the demodulated baseband signal will be sended into scm to dispose through interrupt
上電復(fù)位后，芯片處于接收狀態(tài)，工作在突發(fā)模式下，采用dpsk調(diào)制方式，將ad9057轉(zhuǎn)換完的中頻信號(hào)進(jìn)行復(fù)正交取樣后下變頻、解擴(kuò)、解調(diào)，通過(guò)中斷將解調(diào)完的基帶信號(hào)送入單片機(jī)處理；處于發(fā)送狀態(tài)時(shí)，可將數(shù)據(jù)擴(kuò)頻、調(diào)制，經(jīng)ad9768送出。

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